1. Field of the Invention
The present invention relates generally to timing signals in computer systems, and particularly, to a system and method for synchronizing the adjustment of the Time-Of-Day (TOD) clock in computer systems for enhanced timing precision.
2. Description of the Prior Art
To provide for system integrity and data recovery in computer systems, mainframe server devices such as the zSeries® eServer® available from assignee International Business Machines, Inc., uses the concept of a universal timestamp. Each time a data base record is updated, a recovery record is also created. The recovery record includes a timestamp obtained while the data-base record was locked. The remaining information in the recovery record is sufficient to recover the data-base record, provided the recovery records from all recovery-record data sets for all threads are sorted in sequence using the timestamps. This requires that all TOD clocks in the sysplex must have the same time.
In the past, the TOD clocks in the timing network were synchronized by means of an external box, the 9037 sysplex timer. Each Central Processing Complex (CPC) in the 9037 timing network stepped its TOD clock to the common stepping signals from the 9037. The stepping signals broadcast by the 9037 required special point-to-point links (called External Time Reference (ETR) links) from the 9037 to each CPC. Accurate communication of the stepping signals on the ETR links required a special protocol at the logical and physical signal levels that was different from any other communication protocol. A representative system implementing ETR offset values for synchronizing logical partitions of a logically partitioned machine is described in commonly-owned U.S. Pat. No. 6,209,106.
Current clock synchronization solutions address synchronization of clocks (usually separated by a significant distance) that are stepping at slightly different rates (each clock has a local oscillator). These solutions for synchronization of clocks require a two part action: 1) detecting the difference (or error) between the clocks; and, 2) making an adjustment to the oscillator frequency or stepping rate as a function of the error.
For systems that implement a timing solution that does not include a common stepping signal, timing information is communicated by means of messages with time stamps and other timing information, and each CPC must keep its TOD clock in step with the rest of the other CPCs by computing offsets and taking action to adjust TOD clock. This is similar to the action performed by NTP (Network Timing Protocol), the difference being that NTP is normally implemented in a software layer where time stamps can be generated by the control program. The eServer zSeries® architecture however, has very stringent requirements on the TOD clock; it can be viewed by any problem program, all timestamps must be different, timestamps must never appear to step backwards, and timestamps must appear to be increasing, even when viewed by programs running on different CPUs in the CPC. To make the adjustments to the TOD clock required by the new timing solution, the stepping rate of the TOD clock must be speeded up or slowed down by very fine adjustments, and these adjustments must by observed simultaneously by all CPUs in the CPC. This is critical due to the fact that the time between stepping pulses to the rightmost bit of the TOD clock is comparable to the cache-to-cache transfer time between CPUs. Thus, changing the TOD as viewed by one CPU by the smallest value possible can result in the TOD clock no longer meeting the architecture requirements for the TOD clock as viewed by other CPUs in the CPC.
The zSeries® architecture requires that the TOD clock appears as a single register in the central processing complex. For performance reasons, however, there is a separate slave clock in each CPU. Special hardware, along with special millicode, is provided to synchronize all slave clocks. Without TOD-clock steering, the slave clock is used directly as the TOD-clock value. With TOD-clock steering, an offset must be added to the slave clock to obtain the TOD-clock value. The offset changes approximately every millisecond. Each time the offset changes, this change must be reflected simultaneously to all CPUs in the CPC. In addition, a new episode may take effect approximately once every second. Episode changes must also be reflected to all CPUs in the CPC. There currently is no mechanism in the machine capable of communicating these changes to all CPUs at the exact same instant in time.
It would be desirable to provide a system and method for synchronizing the adjustment of a slave TOD clock-offset value for all slave clocks in a tightly coupled shared storage multiprocessing environment comprising multiple CPUs that implement TOD-clock steering.
It would be further desirable to provide a system and method for synchronizing the adjustment of a slave TOD clock-offset value for all slave clocks in a tightly coupled shared storage multiprocessing environment comprising multiple CPUs, wherein each CPU is enabled to perform the TOD clock-offset value update with no interference between CPUs, provided a new episode in not in the process of being scheduled.
It would be further desirable to provide a system and method for synchronizing the adjustment of a slave TOD clock-offset value for all slave clocks in a tightly coupled shared storage multiprocessing environment comprising multiple CPUs, wherein a mechanism is provided to ensure that the CPU scheduling a new episode exclusively holds the cache line containing the episode parameters.